CORTEXA
← Browse
arxivcs.AR2026-07-27

VPR-Evolve: Multi-Agent-Driven Algorithm Evolution for FPGA Place and Route

Qihang Wu, Taizun Jafri, Aman Arora, Vidya A. Chhabria

CAD tools typically apply the same fixed, hand-designed algorithms across circuits with widely different structural and timing characteristics. A common way to specialize these one-size-fits-all flows to a target design is to tune the CAD tool's hyperparameters. However, hyperparameter tuning can only select among behaviors already implemented by the fixed algorithm, limiting the achievable quality of results while requiring many expensive place-and-route evaluations. We present VPR-Evolve, a multi-agent framework that specializes Versatile Place and Route (VPR), the open-source FPGA pack-place-and-route engine in the Verilog-to-Routing (VTR) flow, by evolving its source code for each design. VPR-Evolve uses LLM agents to propose, implement, and evaluate code-level modifications, while a shared memory records prior outcomes and guides subsequent evolution. Every candidate is evaluated through a complete VPR build and run, directly optimizing a composite score measured as a weighted function of critical-path delay (CPD), routed wirelength (WL), and tool runtime (RT). Across five VTR-9 benchmark circuits, VPR-Evolve improves the composite score by up to 2.7% over stock VPR in VTR-9. Relative to stock VPR, it reduces CPD by up to 9.8%, routed WL by up to 18.1%, and tool RT by up to 79.3%. VPR-Evolve reduces CPD by up to 6.0%, routed WL by up to 2.2%, and tool RT by up to 7.8% compared with a hyperparameter-tuning baseline.

View free PDFSource page

Related papers

arxivcs.AIcs.AR2026-06-29

AgRefactor: Self-Evolving Agentic Workflow for HLS Compatibility and Performance

Yang Zou, Zijian Ding, Yizhou Sun, Jason Cong

High-Level Synthesis (HLS) provides a fast path from concepts to silicon, but converting real-world software into synthesizable HLS code remains challenging due to restrictive language support and the gap between software and hardware programming practices. Existing automated and…

View free PDFSource page
arxivcs.AIcs.ARcs.CR2026-07-28

ContractHIL-HLS: Contract-Aligned Multi-Agent Workflow with Hardware-in-the-Loop Feedback for HLS Design

Jingbo Zhang, Haoxiang Sun, Wenbo Wang, Wenbo Zhang

This paper presents ContractHIL-HLS, a contract-aligned multi-agent workflow for practical high-level synthesis (HLS) engineering. The workflow makes three contributions. First, it introduces a structured contract as the semantic-alignment and task-execution artifact that transla…

View free PDFSource page
arxivcs.LGcs.AR2026-07-22

AlphaRoute: Large Language Models as Semantic Optimizers for Multi-Objective Routing

Kabir Murjani, Mishri Bhavsar, Manish I. Patel, Jonti Talukdar

Very Large Scale Integration (VLSI) global routing is an NP-hard combinatorial optimization problem requiring signal net assignment across capacity-constrained 3D grids while minimizing congestion, wirelength, and via transitions. Because traditional heuristics rely on static pen…

View free PDFSource page
arxivcs.ARcs.AI2026-06-26

Agentic Hardware Design as Repository-Level Code Evolution

Cunxi Yu, Chenhui Deng, Nathaniel Pinckney, Brucek Khailany

We present HORIZON, a self-evolving agent framework that treats hardware design as repository-level code evolution. A Markdown harness is compiled into a project pack containing domain knowledge, an executable evaluator, an acceptance predicate, and a git/runtime policy; a hands-…

View free PDFSource page
arxivcs.SEcs.AIcs.ARcs.LG2026-07-15

Towards Reliable AI-Assisted Analog Design: Template-Constrained LLM Agents for SAR ADC Generation

Dimple Vijay Kochar, Hae-Seung Lee, Anantha P. Chandrakasan

While Large Language Models (LLMs) have demonstrated significant capability in software code generation, their application to analog Electronic Design Automation (EDA) is bottlenecked. Owing to limited circuit topology understanding and data, directly prompting LLMs and multimoda…

View free PDFSource page