arxivcs.AR2026-07-23
Chip Floorplanning Combining Convex and Non-convex Optimization
Yilihamujiang Yimamu, Guillem Pastor-Rué, Jordi Cortadella
Floorplanning is a critical early stage of VLSI physical design, and its quality directly impacts interconnect wirelength, chip performance, and downstream design efficiency. This article presents a multi-stage fixed-outline floorplanning framework that combines non-convex and co…