arxivcs.AReess.SY2026-07-24
Reducing Instruction-Fetch Energy in RISC-V for Embedded AI Processing via Dynamic and Static Loop Caching
Wiebren Wijnstra, Sameed Sohail, Berend-Jan van der Zwaag, Sabih Gerez, Amirreza Yousefzadeh
Embedded RISC-V processors are increasingly deployed for on-device AI inference at the edge, where energy efficiency is a primary design constraint. Instruction fetching from SRAM-based memory is a dominant source of energy consumption in these cores, accounting for over 40\% of…