arxivcs.AR2026-07-27
DICE: Detailed Inter-Chiplet End-to-End PHY Modeling for Accurate Chiplet Simulation
Rashid Aligholipour, Stefanos kaxiras, Yuan Yao
Scaling monolithic multicores is increasingly constrained by power/thermal limits, yield, and rising manufacturing and testing costs. Chiplet designs address these challenges by partitioning large dies into smaller parts (typically multiple core-complex dies and an I/O die) linke…